{"title": "Kirchoff Law Markov Fields for Analog Circuit Design", "book": "Advances in Neural Information Processing Systems", "page_first": 907, "page_last": 913, "abstract": null, "full_text": "Kirchoff Law  Markov Fields for  Analog \n\nCircuit  Design \n\nRichard M.  Golden * \nRMG  Consulting Inc. \n\n2000  Fresno Road,  Plano,  Texas  75074 \n\nRMGCONSULT@AOL.COM, \n\nwww.neural-network.com \n\nAbstract \n\nThree contributions to developing an algorithm for  assisting engi(cid:173)\nneers in designing analog circuits are provided in this paper.  First, \na  method  for  representing  highly  nonlinear  and  non-continuous \nanalog circuits using Kirchoff current law potential functions within \nthe context of a Markov field  is described.  Second, a relatively effi(cid:173)\ncient  algorithm for  optimizing the Markov field  objective function \nis  briefly  described  and the  convergence proof is  briefly  sketched. \nAnd  third,  empirical  results  illustrating  the strengths and limita(cid:173)\ntions  of the approach  are provided within the context  of a  JFET \ntransistor design problem.  The proposed algorithm generated a set \nof circuit components for  the JFET circuit model  that accurately \ngenerated the desired characteristic curves. \n\n1  Analog circuit design using Markov random fields \n\n1.1  Markov random field  models \n\nA Markov random field  (MRF) is a generalization of the concept of a Markov chain. \nIn a Markov field  one begins with a set of random variables and a  neighborhood re(cid:173)\nlation which  is  represented by a  graph.  Each  random  variable  will  be  assumed  in \nthis paper to be  a  discrete random variable which  takes on  one of a  finite  number \nof possible  values.  Each  node  of the graph  indexs  a  specific  random  variable.  A \nlink  from  the  jth node  to  the  ith  node  indicates  that  the  conditional  probability \ndistribution of the ith random variable in the field  is functionally  dependent  upon \nthe jth random variable.  That is,  random variable j  is  a  neighbor of random  vari(cid:173)\nable i.  The only restriction upon the definition of a  Markov field  (Le.,  the positivity \ncondition)  is  that  the  probability  of every  realization  of the field  is  strictly  posi(cid:173)\ntive.  The essential idea behind  Markov field  design is that one specifies  a potential \n(energy)  function  for  every clique in  the  neighborhood graph such  that the subset \nof random  variables  associated  with  that clique  obtain their  optimal values  when \nthat clique'S  potential function  obtains  its  minimal  value  (for  reviews  see  [1]-[2]) . \n\n\u2022  Associate Professor  at University of Texas at Dallas  (www.utdallas.eduj-901den) \n\n\f908 \n\nR. M.  Golden \n\nMarkov  random field  models  provide a  convenient  mechanism for  probabilistically \nrepresenting and optimally combining combinations of local constraints. \n\n1.2  Analog circuit design using SPICE \n\nIn some mixed signal  ASIC  (Application  Specific Integrated Circuit)  design  prob(cid:173)\nlems,  most of the circuit design specifications are well  known but the introduction \nof a  single  constraint  (e.g.,  an increase in substrate noise)  could  result  in a  major \nredesign  of an  entire  circuit.  The  industry  standard  tool  for  aiding  engineers  in \nsolving  analog circuit  design  problems  is  SPICE which  is  a  software  environment \nfor  simulation of large scale electronic circuits.  SPICE does  have special optimiza(cid:173)\ntion  options  for  fitting  circuit  parameters to  desired  input-output  characteristics \nbut  typically such  constraints  are too  weak  for  SPICE to solve  analog circuit  de(cid:173)\nsign problems with large numbers of free  parameters (see [3]  for  an introduction to \nSPICE).  Another difficulty  with  using  SPICE is  that it  does  not  provide  a  global \nconfidence factor  for  indicating its confidence  in  a  generated design or local  confi(cid:173)\ndence  factors  for  determining the  locations of \"weak  points\"  in  the automatically \ngenerated circuit design  solution. \n\n1.3  Markov field approaches to analog circuit  design \n\nIn this paper, an approach for  solving real-world analog circuit design problems us(cid:173)\ning an appropriately constructed Markov random is proposed which will  be referred \nto as MRFSPICE. Not only are desired input-output characteristics directly incor(cid:173)\nporated  into  the  construction  of the  potential  functions  for  the  Markov  field  but \nadditional constraints based upon  Kirchoff's  current law are directly incorporated \ninto the field.  This approach thus differs from  the classic  SPICE methodology  be(cid:173)\ncause Kirchoff current law constraints are explicitly incorporated into an objective \nfunction  which  is  minimized  by  the  \"optimal  design\".  This  approach  also  differs \nfrom  previous Markov field  approaches  (Le.,  the \"Harmony\"  neural network model \n[4]  and the \"Brain-State-in-a-Box\"  neural network model  [5])  designed to qualita(cid:173)\ntively  model  human  understanding  of  electronic  circuit  behavior  since  those  ap(cid:173)\nproaches used pair-wise correlational (quadratic) potential functions  as opposed to \nthe highly nonlinear potential functions that will be used in the approach described \nin this paper. \n\n1.4  Key contributions \n\nThis paper thus makes three important contributions to the application of Markov \nrandom fields  to the analog circuit  design  problem.  First, a  method for  represent(cid:173)\ning highly  nonlinear and non-continuous analog circuits using Kirchoff current law \npotential  functions  within  the  context  of a  Markov  field  is  described.  Second,  a \nrelatively  efficient  algorithm  for  optimizing the  Markov  field  objective function  is \nbriefly described and the convergence proof is briefly sketched.  And third, empirical \nresults illustrating the strengths and limitations of the approach  is  provided within \nthe context of a  JFET transistor design  problem. \n\n2  Modeling assumptions and algorithms \n\n2.1  Probabilistic modeling assumptions \n\nA given circuit circuit design problem consists of a  number of design decision  vari(cid:173)\nables.  Denote  those  design  decision  variables  by  the  discrete  random  variables \n\n\fKirchoff Law Markov Fields for Analog Circuit Design \n\n909 \n\nXl, ... ,Xd'  Let  the  MRF  be denoted  by  the  set x = [Xl\"'\"  Xd]  so  that  a  realiza(cid:173)\ntion  of x is  the  d-dimensional  real  vector  x.  A  realization  of x is  referred  to as  a \ncircuit  design  solution. \nLet  the  joint  (global)  probability  mass  function  for  x be  denoted  by  Po. \nIt  is \nassumed that po(x) > po(y) if and only if the circuit design solution x  is preferred \nto the circuit  design solution y.  Thus, po(x) specifies  a  type of probabilistic fuzzy \nmeasure [1]. \n\nFor  example,  the  random  variable  Xi  might  refer  to  a  design  decision  concerning \nthe  choice  of a  particular  value  for  a  capacitor  C14 .  From  previous  experience, \nit  is  expected  that  the  value  of CI4  may  be  usually  constrained  without  serious \ndifficulties to one of ten possible values: \n\nO.IJ.LF, 0.2J.LF, 0.3J.LF, O.4J.LF, 0.5J.LF, 0.6J.LF, 0.7J.LF, 0.8J.LF, 0.9J.LF,  ar  1J.LF. \n\nThus,  ki  =  10  in  this example.  By limiting the choice of CI4  to a  small number of \nfinite values, this permits the introduction of design  expertise hints directly into the \nproblem formulation without making strong committments to the ultimate choice of \nthe value of capacitor C14 \u2022  Other examples of design decision variable values include: \nresistor values, inductor values, transistor types, diode types, or even fundamentally \ndifferent  circuit topologies. \nThe problem that is now considered will be to assign design preference probabilities \nin a meaningful way to alternative design solutions.  The strategy for  doing this will \nbe based upon constructing po with the property that if po(x) > po(y), then circuit \ndesign  solution  x  exhibits  the  requisite operating characteristics  with  respect  to a \nset of M  \"test circuits\"  more effectively than circuit design solution y.  An optimal \nanalog circuit design  solution x*  then may be defined  as  a  global maximum of Po. \nThe specific  details  of this strategy for  constructing Po  are  now  discussed  by  first \ncarefully defining  the concept of a \"test circuit\". \nLet  V  =  {O, 1, 2, ... ,m}  be  a  finite  set of integers  (i.e.,  the  unique  \"terminals\"  in \nthe test  circuit)  which  index a  set of m  complex numbers,  Vo, VI, V2, .\u2022. ,Vm  which \nwill  be referred to as  voltages.  The magnitude of Vk  indicates the voltage magnitude \nwhile  the  angle  of Vk  indicates  the  voltage phase shift.  By  convention  the  ground \nvoltage,  Vo ,  is  always  assigned  the value  of O.  Let  d  E  V  x V  (i.e.,  an  ordered pair \nof elements in V).  A  circuit  component  current source is  defined  with  respect  to V \nby  a  complex-valued  function  ia,b  whose  value  is  typically functionally  dependent \nupon  Va  and  Vb  but  may  also  be  functionally  dependent  upon  other voltages  and \ncircuit component current sources associated with V. \nFor  example,  a  \"resistor\"  circuit  component  current  source  would  be  modeled  by \nchoosing ia ,b = (Vb  - Va) / R where R is  the resistance in ohms of some resistor, Vb  is \nthe voltage observed on one terminal of the resistor, and Va  is  the voltage observed \non the other terminal of the resistor.  The quantity ia ,b is the current flowing through \nthe resistor from terminal a to terminal b.  Similarly, a \"capacitor\" circuit component \ncurrent source would be modeled by choosing ia,b = (Vb - Va) /[27rj f] where j  = A \nand  f  is  the  frequency  in  Hz  of the  test  circuit.  A  \"frequency  specific  voltage \ncontrolled  current  source\"  circuit  component  current  source  may  be  modeled  by \nmaking ia ,b functionally dependent upon some subset of voltages in the test circuit. \nSee  [6]  for  additional  details  regarding  the  use  of complex  arithmetic  for  analog \ncircuit analysis and design. \n\nAn  important  design  constraint  is  that  Kirchoff's  current  law  should  be satisfied \nat  every  voltage  node.  Kirchoff's  current  law  states  that  the sum of the  currents \nentering  a  voltage  node  must  be  equal  to  zero  [6].  We  will  now  show  how  this \nphysical  law  can  be directly  embodied as  a  system of nonlinear constraints on the \n\n\f910 \n\nbehavior of the MRF. \n\nR.  M.  Golden \n\nWe  say  that  the  kth  voltage  node  in  test  circuit  q  is  clamped if the  voltage  Vk  is \nknown.  For example, node k  in circuit q might be directly grounded, node k  might \nbe  directly  connected  to a  grounded  voltage source,  or  the  voltage  at node  k,  Vk, \nmight be a  desired known target voltage. \n\nIf voltage node k  in test circuit q is damped, then Kirchoff's current law at voltage \nnode k  in circuit q is simply assumed to be satisfied which, in turn, implies that the \nvoltage  potential function  \u00ablq,k  =  O. \nNow  suppose  that  voltage  node  k  in  test  circuit  q  is  not  clamped.  This  means \nthat  the  voltage  at node  k  must  be  estimated.  If there  are no  controlled  current \nsources in the test circuit (Le.,  only passive devices), then the values of the voltages \nat  the  undamped  nodes  in  the  circuit  can  be  calculated  by  solving  a  system  of \nlinear equations where  the current  choice  of circuit  component  values  are treated \nas constants.  In the more general case where controlled current sources exist in the \ntest circuit,  then an approximate iterative gradient descent algorithm  (such  as  the \nalgorithm used  by SPICE)  is  used  to obtain improved estimates of the voltages of \nthe undamped nodes.  The iterative algorithm is  always  run for  a  fixed  number of \niterations. \n\nNow  the  value  of  \u00ablq,k  must  be  computed.  The  current  entering  node  k  via  arc \nj  in  test  circuit  q  is  denoted  by  the  two-dimensional  real  vector  Ik,i  whose  first \ncomponent is  the real part of the complex current and whose second component is \nthe imaginary part. \nThe average current entering node k  in test circuit  q is  given by the formula: \n\n-q \nIk  =  (link) L- Ik,i' \n\nnit \n~ q \n\nj=l \n\npesign circuit components (e.g.,  resistors, capacitors, diodes,  etc.)  which  minimize \nIt  will  satisfy  Kirchoff's  current  law  at  node  k  in  test  circuit  q.  However,  the \nmeasure It  is  an not entirely adequate indicator of the degree to which  Kirchoff's \ncurrent law is satisfied since 1%  may be small in magnitude not necessarily because \nKirchoff's current law is satisfied but simply because all currents entering node k  are \nsmall  in  magnitude.  To  compensate for  this  problem,  a  normalized  current signal \nmagnitude to current signal variability ratio is  minimized  at node  k  in test circuit \nq.  This  ratio decreases  in magnitude if 1%  has  a  magnitude  which  is  small relative \nto the magnitude of individual currents entering node k  in test circuit  q. \nThe  voltage  potential  function,  \u00abl q,k,  for  voltage  node  k  in  test  circuit  q  is  now \nformally  defined as follows.  Let \n\nLet  AI, ... , Au  be  those  eigenvalues  of Qk,q  whose  values are strictly  greater than \nsome small positive number \u20ac.  Let ei  be the eigenvector associated with eigenvalue \nAi.  Define \n\nu \n\nQk,~ =  L(l/Aj)ejeJ. \n\nj=l \n\nThus, if Qk,q  has all  positive eigenvalues, then Qk,q  is  simply the matrix inverse of \nQk,~.  Using this notation, the voltage potential function for  the undamped voltage \n\n\fKirchoff Law Markov Fields for Analog Circuit Design \n\n911 \n\nnode  k  in test circuit q  may be expressed by the formula: \n\n;\u00a5,. \n\n'i!q,1e  = \n\n[-Iq]TQ-I-Iq \nIe' \n\nIe \n\nNow define the global probability or \"global preference\"  of a particular design con(cid:173)\nfiguration by the formula: \n\nPG(x) = (l/Z)exp( -U(x\u00bb \n\n(1) \nwhere  U  =  (liN) Lq Lk <I>q,k  and where  N  is  the  total  number  of voltage  nodes \nacross  all  test  circuits.  The  most  preferred  (Le.,  \"most  probable\")  design  are  the \ndesign  circuit  components  that  maximize  PG.  Note  that  probabilities  have  been \nassigned  such  that  circuit  configurations  which  are  less  consistent  with  Kirchoff's \ncurrent law  are considered \"less probable\"  (Le.,  \"less preferred\"). \nBecause the normalization constant Z  in (I) is computationally intractable to com(cid:173)\npute,  it  is  helpful  to define  the  easily  computable  circuit  confidence  factor,  CCF, \ngiven  by  the  formula:  CCF{x)  = exp( -U{x\u00bb  = ZPG{x) .  Note  that  the  global \nprobability P is  directly proportional to the CCF.  Since  U is  always non-negative \nand complete satisfaction of Kirchoff's  current  laws corresponds to the case where \nU  = 0,  it follows  that  CCF(x)  has  a  lower  bound of 0  (indicating  \"no subjective \nconfidence\"  in the design solution x) and an upper bound of 1 (indicating\" absolute \nsubjective confidence\"  in the design  solution x). \nIn addition, local conditional probabilities of the form \n\ncan be computed using the formula: \n\nSuch  local conditional probabilities are helpful for  explicitly computing the proba(cid:173)\nbility or \"preference\" for selecting one design circuit component value given a subset \nof other design  component values  have been accepted.  Remember that probability \n(Le.,  \"preference\")  is  essentially  a  measure  of the degree  to  which  the chosen  de(cid:173)\nsign components and pre-specified operating characteristic voltage versus frequency \ncurves of the circuit satisfy Kirchoff's current laws. \n\n2.2  MRFSPICE algorithm \n\nThe  MRFSPICE  algorithm  is  a  combination  of the  Metropolis  and  Besag's  ICM \n(Iterated  Conditional  Modes)  algorithms  [1]-[2].  The  stochastic  Metropolis  algo(cid:173)\nrithm  (with  temperature parameter set equal to one)  is  used  to sample from  p(x). \nAs each design solution is  generated, the CCF for  that design solution is  computed \nand the design solution with the best CCF is kept as an initial design solution guess \nXo.  Next, the deterministic ICM algorithm is then initialized with Xo  and the ICM \nalgorithm is  applied until an equilibrium point is  reached. \nA simulated annealing method involving decreasing the temperature parameter ac(cid:173)\ncording to a logarithmic cooling schedule in Step 1 through Step 5 could easily be \nused  to  guarantee  convergence  in  distribution  to  a  uniform  distribution  over  the \nglobal maxima of PG  (Le., convergence to an optimal solution)  [1]-[2].  However, for \nthe test problems considered thus far, equally effective results have been obtained by \nusing the above fast  heuristic algorithm which  is  guaranteed to converge to a  local \nmaximum as opposed to a global maximum.  It is proposed that in situations where \nthe convergence rate is  slow  or the local  maximum generated by  MRFSPICE is  a \n\n\f912 \n\nR.  M.  Golden \n\npoor design solution with  low  CCF,  that appropriate local  conditional probabilites \nbe  computed  and  provided  as  feedback  to  a  human  design  engineer.  The  human \ndesign engineer can then make direct alterations to the sample space of PG  (Le.,  the \ndomain  of CC F)  in  order  to  appropriately simply  the  search space.  Finally,  the \nICM  algorithm  can  be  easily viewed  as  an artificial  neural  network algorithm  and \nin fact  is  a generalization of the  classic  Hopfield  (1982)  model  as  noted in  [1]. \n\n+ \"'\"\"\"----~ \n\n!!.TEST \n\n!GTEST \n\n~OQ1 \n\n.sQ1 \n\nFigure 1:  As external input voltage generator EGTEST and external supply voltage \nEDT EST are  varied,  current ffiTEST  flowing  through external resistor RTEST  is \nmeasured. \n\n3  JFET design problem \n\nIn this design problem, specific combinations of free  parameters for a  macroequiva(cid:173)\nlent JFET transistor model were selected on the basis of a given set of characteristic \ncurves specifying how the drain to source current of the JFET varied as a function of \nthe gate voltage and drain voltage at OH z and 1M H z.  Specifically, a .JFET transis~ \ntor model  ~;as simulated using the classic Shichman and Hodges (1968)  large-signal \nn-channel .JFET  model  as  described  by Vladimirescu  [3]  (pp.  96-100).  The circuit \ndiagram  of this  transistor  model  is  shown  in  Figure  1.  The only  components  in \nthe circuit diagram which  are not part of the JFET transistor model are the exter(cid:173)\nnal  voltage generators EDTEST  and EGTEST, and external resistor RTEST.  The \nspecific functions  which describe how IDIQGDl, CDIQGD1,  RDIQGD1, IDIQGSl, \nCDIQGS1,  RDIQGSl,  CGDQ1, and CGSQ1 change as a function of EGTEST and \nthe current IRTEST (which  Hows  through RTEST)  are too long and complex to be \n\n\fKirchoff Law Markov Fields for Analog Circuit Design \n\n913 \n\npresented here  (for more details see  [3]  pp.  96-100). \n\nFive  design  decision  variables  were  defined.  The  first  design  decision  variable, \nXDIQGS1,  specified  a  set  of parameter  values  for  the  large  signal  gate  to source \ndiode  model  portion of the  JFET  model.  There  were  20  possible  choices  for  the \nvalue  of XDIQGS1.  Similarly, the second design decision variable, XDIQGDl,  had \n20 possible values and specified a set of parameter values for the large signal gate to \ndrain diode  model  portion of the  JFET model.  The third design  decision  variable \nwas XQl which also had 20 possible values were each value specified a set of choices \nfor  JFET -type specific  parameters.  The fourth  and  fifth  design  decision  variables \nwere  the  resistors RSQl and  RSDI  each of which  could take on one of 15  possible \nvalues. \n\nThe  results  of the  JFET design  problem  are  shown  in  Table  1.  The  phase  angle \nfor  IRTEST  at  1M H z  was  specified  to  be  approximately  10  degrees,  while  the \nobserved phase angle for  IRTEST ranged from  7 to 9 degrees.  The computing time \nwas  approximately  2 - 4 hours  using unoptimized  prototype  MATLAB  code  on  a \n200  MHZ  Pentium Processor.  The close agreement between the desired and actual \nresults suggests further  research in this area would be highly rewarding. \n\nTable 1:  Evaluation of MRFSPICE-generated JFET design \n\nEGTEST  EDTEST \n\n0 \n0 \n0 \n-0.5 \n-0.5 \n-0.5 \n-1.0 \n-1.0 \n-1.0 \n\n1.5 \n2.0 \n3.0 \n1.5 \n2.0 \n3.0 \n1.5 \n2.0 \n3.0 \n\nIRTEST  @  DC  (rna) \n\n(desired/ actual) \n\n1.47/1.50 \n1.96/1.99 \n2.94/2.99 \n1.47/1.50 \n1.96/2.00 \n2.95/2.99 \n1.48/1.50 \n1.97/2.00 \n2.9613.00 \n\nIRTEST  @  IMHZ _~ma) \n\n(desired/ actual) \n\n1.19  1.21 \n1.60  1.62 \n2.43  2.43 \n1.07/1.11 \n1.49/1.52 \n2.34/2.35 \n0.96/1.02 \n1.39/1.44 \n2.27/2.29 \n\nAcknowledgments \n\nThis  research  was  funded  by  Texas  Instruments  Inc. \nthrough  the  direct  efforts \nof Kerry  Hanson.  Both  Kerry  Hanson  and  Ralph  Golden  provided  numerous  key \ninsights and knowledge substantially improving this project's quality. \n\nReferences \n\n[1]  Golden,  R.  M.  (1996)  Mathematical  methods  for  neural  network  analysis  and  design. \nCambridge:  MIT  Press. \n\n[2]  Winkler,  G. (1995)  Image  analysis,  random  fields,  and  dynamic  Monte  Carlo  methods: \nA  mathematical introduction.  New York:  Springer-Verlag. \n\n[3]  Vladimirescu,  A. (1994)  The  SPICE book.  New York:  Wiley. \n\n[4]  Smolensky,  P.  (1986).  Information  processing  in  dynamical  systems:  Foundations  of \nHarmony  theory.  In  D.  E.  Rumelhart  and  J .  L.  McClelland  (eds.),  Parallel  distributed \nprocessing.  Volume  1:  Foundations,  pp.  194-281.  Cambridge:  MIT  Press. \n\n[5]  Anderson,  J . A.  (1995).  An introduction  to  neural networks.  Cambridge:  MIT Press. \n\n[6]  Skilling,  H.  (1959)  Electrical  engineering  circuits.  New York:  Wiley. \n\n\f", "award": [], "sourceid": 1744, "authors": [{"given_name": "Richard", "family_name": "Golden", "institution": null}]}